In this chapter we present an autocorrelator design based on a
circular shift register with on-chip prescaling and off-chip
accumulation requiring only 74 Josephson junctions per stage. Its main
features include double oversampling, continuous mode of operation and
ultra-low power dissipation. We report experimental results for the
two main blocks of the autocorrelator: a 16-stage delay line with
multiplication and an array of low-power T flip-flop binary counters,
both implemented using HYPRES' 
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Nb-trilayer technology.