Discussion

Based on results shown in Fig. we can make several conclusions.

1. Position and slope of the upper margin was found to be largely independent of frequency for all 4 XORs. This can be explained as follows. When XOR is close to the upper margin, operation is done very fast and when the clock pulse arrives it hits an empty cell. But, since we are close the upper margin, the current through inductance LXO (see Fig. ) which controls the comparator JXC-JXO1, is very high and close to the threshold value corresponding to the flip of junction JXO1, so we start to see rare errors. In order to prove that, we have carried out a similar set of experiments for the operation (when current ``SIG'' is low and there are no ``ain'' inputs, see Fig. ). Position and behavior of the upper margin in this case were found to be very similar to the case. There is no lower margin for the operation since at lower values of the controlling current junction JXO1 never flips.

Thermally induced errors can be of two main types - ``dynamic'' and ``static''. ``Static'' errors correspond to fluctuation induced flux transitions during the passive data storage in an RSFQ cell. ``Dynamic'' errors correspond to switching of the cell into a wrong state by an intentional SFQ pulse. Both ``dynamic'' and ``static'' thermal errors in RSFQ comparators have been studied theoretically and experimentally in [8, 9]. Formula (6) in [3] gives the following equation for the dynamic error rate in our case:

 

Here is the relative bias margin, is the bit error rate and . From Eq. () we find the absolute value of the slope of the upper margin (for and x=11; this value of includes the observed increase in critical current density), while experimentally observed value was for all values of nominal bias and all clock speeds. The difference between the theoretically predicted and experimentally measured slopes could be attributed to several factors. First, the experimental and theoretical studies of RSFQ comparators [8, 9] have shown that the effective width of the gray zone of the comparators is rather sensitive to the speed of the driving waveform . In our case, was determined by the SFQ pulse from the clock distribution path. As it was shown in [8], the phase dynamic in this case is different from the model time dependence used in derivation of Eq. (). Second important factor influencing the comparator gray zone is the effective output impedance of the driver (see [9]). In our case of a standard RSFQ driver (compare with Fig. 2 in [9]), the output impedance was comparable with the ``normal'' resistance of the junctions in the comparator. For this case the experimentally measured value of the comparator gray zone was the largest (see Fig. 5 in [9]) and correspondence with the results of the numerical simulations done in [8] for the case of low impedance was less clear.

2. We found that the lower margin was very sensitive to the value of the nominal bias and moved up at lower biases and higher frequencies. In our view, this is a very non-trivial effect of a ``double-dynamic'' or ``speed'' error which cannot be explained by a simple formula Eq. (). A possible picture of the processes going in an underbiased XOR, suggested by computer simulation, is that junction JXO2 (Fig. ) moves so slowly at low bias that it does not completely finish the switching before the clock pulse arrives. As a result, the clock hits the JXC-JXO1 comparator when it is biased closer to its threshold value and an error occurs. Although the position of the lower margin was clearly shifted up for XORs with lower bias, it was mostly determined by clock speed as shown in Fig. . Fig. shows the relative total width of the bias window

where is the upper margin, is the lower margin and is the nominal bias, at error rate as a function of clock speed. One can see that the dependence is close to linear.

 
Figure:  Relative total width of the bias window as a function of clock speed at error rate.

3. We also observed the change in the slope of the lower margin so that at higher frequencies not only the operating region was smaller but the minimum error rate at optimal bias was larger. Typically, the absolute value of the slope was around 80-100 at and down to 25-30 at . Linearly extrapolating the error rate curves at both upper and lower margins and finding the point of cross-over we estimated the minimal error rate at optimal bias. The results are shown in Fig. . Of course, linear extrapolation may be misleading in this case since theoretical formulas for are not linear both for dynamic and static errors [3]. For dynamic errors we have and for static errors the dependence is . In both cases the error rate falls faster than a linear function as we move inside the bias window, so the actual minimal error rate at optimal bias can be much smaller than the value predicted by linear extrapolation. However, we have two excuses for making the linear estimate. First, three points in Fig. were found experimentally at 25 GHz. Second, the upper and lower bias margins were also quite close to each other at 22 and at 20 GHz, so the linear extrapolation could be correct. At lower frequencies the linear extrapolation is less valid and the corresponding points in Fig. should be treated as guesses. Nevertheless, error rates of the order of conform with theoretical predictions [8]. With all these uncertainties the main message of Fig. is clear: the minimum error rate increases with clock speed and decreases with nominal bias voltage (= dissipated power).

Finally, we would like to comment on the observation of the minimum error rate at 25 GHz. When measuring error rate for a particular XOR we kept all other XORs and the circular shift register at their optimal biases and, as expected, we observed events only in the XOR close to its bias margin. One exception to this rule was when we studied the ``bottom'' or cross-over region at : at the lowest point 3 XORs were generating errors at approximately the same rate. However, when we moved off this point errors again became independent. So, even if we discard the data for the lowest point and consider only the statistically independent shapes of the lower and upper margins and linearly extrapolate them we would find the crossing point at the same place. Surprisingly, at 25 GHz we did not observe the minimum error rate of the XOR with the smallest nominal bias of 0.1 mV . This could be attributed to the fact that, unlike the other three XORs with higher nominal biases, this particular XOR was positioned at the end of the delay line with the resulting change in environment.

 
Figure:  Minimum error rate versus clock speed.