During the past three decades, digital technology based on semiconductor transistors demonstrated remarkably continuous progress, with exponential improvement of all basic figures-of-merit including both the density of integrated circuits and their speed. Recent authoritative analyzes (see, e.g., the renowned National Technology Roadmap for Semiconductors) have shown that the growth of integration scale is likely to continue for at least the next 15 years, increasing by a factor of 1,000 during this period. But on the same breath, the same sources predict that the clock frequency of high-performance semiconductor logic circuits will increase less than 4-fold, from the present ~300 MHz to ~1.1 GHz by 2010. The origin of these problems is not the intrinsic speed of semiconductor transistors, but rather their large power consumption and the diffusive character of signal propagation.
Integrated circuits using superconductors have several properties which make them more suitable for ultrafast processing of digital information. These features include:
That is why, beginning in the 1960s, several attempts were made to develop a practical superconductor digital technology. Among them, the IBM project in the USA (1969 - 1983) and the MITI project in Japan (1981-1990) should be mentioned. These projects were terminated without commercializing the technology, because the achieved speed (clock frequency ~1 GHz) is only marginally higher than that in modern CMOS and bipolar transistor circuits, which hardly justifies the necessary helium cooling. The main factor limiting the speed was an unfortunate choice of so-called "latching" circuitry which tried to mimic semiconductor transistor circuits by coding digital bits by voltage levels. In semiconductors, such a representation is the only available option, but in Josephson junction circuits (with their lack of effective transistors) this approach created hard problems.
In 1985, a new ultrafast Josephson junction circuitry was proposed by K. Likharev, O. Mukhanov, and V. Semenov (then at Moscow State University, Moscow, Russia). In these "Rapid Single-Flux-Quantum" (RSFQ) devices, digital bits are coded in statics by the single quanta of magnetic flux, while in dynamics the data are transferred as picosecond "SFQ" pulses with quantized area. As a result of this presentation of information (very natural for superconductors), the clock frequency of RSFQ-based LSI circuits may be well above 100 GHz, i.e. at least 300 times higher than that in the fastest semiconductor circuits of similar complexity.
Since 1991, when the inventors of the RSFQ logic and their associates had moved to the United States and started its practical implementation, all the basic concepts of this approach have been confirmed experimentally. In particular, relatively complex circuits (with hundreds of gates) have been designed, fabricated, and tested. Simple circuits using a 1.5-um technology have been demonstrated to operate at frequencies up to 370 GHz, while transfer to 0.5-um technology should allow to raise the maximum frequency to at least 700 GHz.
The main problem with the low-Tc RSFQ circuits is the necessity of their cooling to 4 to 5 K. Presently, closed-cycle refrigerators of this "helium" temperature range are costly (~$15 K) and bulky (~100 lb.), though recent rapid progress in cryocooler technology gives any reason to believe that the cost per unit may be reduced to below ~$1,000 when they are produced in volume.
For several important military and commercial applications this drawback is more than compensated by the unparalleled performance of the RSFQ devices. These applications include (but are not limited to) the following:
In some of these prospective large-scale applications, the extremely low power consumption of RSFQ circuits may be much more important than their high speed.
Simultaneously, the maturing technology of high-Tc superconductors may make possible RSFQ systems operating at nitrogen temperatures, cutting refrigeration costs and boosting speed even further. As a result, RSFQ may be established as the leading digital technology for high-performance computing, communications, and instrumentation.
What follows are some pictures illustrating various aspects of the RSFQ technology. They are essentially copies of some of the viewgraphs I used for a talk entitled "RSFQ: A New Ultra-fast, Ultra-Low-Power Computing Technology" which was presented at the Petaflops Architecture Workshop (PAWS'96) in Oxnard, CA in April 1996.
And here, we become a little bit technical: some basic RSFQ circuit building blocks and their quasi-optimal parameters:
Try to read my review written in 1992 (due to the fast development of the field the discussion of experimental results in that review is obsolete, but the general concepts are still intact) and/or our other papers. If you have questions, send a message to K. Likharev or anybody in the group.
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