| SUNY RSFQ Cell Library |
All parameters are in PSCAN dimensionless units .
This is the simplest RSFQ element. It allows an input SFQ pulse to pass through (in either direction) while possibly "sharpening" the pulse.
The main use of JTL in real designs is interconnecting more complex cells over short distances while insulating the cells from each other.
Probably even more important use of this circuit is during simulation and optimization of more complex cells to provide "standard" load on cell's input and output ports. Then we try to optimize a cell in such a way that there is no current flowing through its IO ports. Cells optimized in such a way can be interconnected directly with an inductance without intermediate JTL junctions. Achieving this goal usually means adding an extra junction on each port, these junctions can be viewed as interconnecting JTL junctions while they belong to the cell itself.
Choosing the parameters of the "standard" JTL segment is probably the first thing one does when faced with a novel JJ technology or when designing a new cell library. Usually such a standard JTL has junctions of critical current 2 (in dimensionless units) with interconnecting inductance of 1.5 units. In our library junctions are biased to 0.7 of their critical current (i.e., power supply current is 2.8 units divided evenly between two junctions). This provides for -30% margin on global critical current density XJ and +43% for the margin on global power supply current XI. Lowering the bias value will increase these margins but will make JTL slower. With our parameters the delay in JTL is about 4 time units per Josephson junction.
One can also design an "amplifying" JTL segment with gradually increased values of junction critical currents. The suggested Ic factor between two consecutive junctions is Sqrt(2), i.e., a junction with value 1.4 can drive a junction with value 2 which in turn can drive one with value 2.8. In this case all junctions are still biased to 0.7 of their critical currents, the central power supply current naturally is the sum of these bias currents and ratio of inductances L2/L3 should be chosen to divide this current in the right proportion between the two junctions. The sum of L2+L3 is chosen to drive the larger junction J2.
View online the files necessary to simulate the circuit with Julia or download the whole compressed directory.
This cell was optimized for interconnectivity to be a part of cell library.
This layout is an illustration of Paul's approach to laying out RSFQ cells. The idea is that Josephson junctions which correspond to cell IO ports are located in cell corners so that they are easily accessible from two directions. The IO inductances L4, L5 are only partially included in the cell layout and we write down the values of missing part (0.58 units in this case). When we want to connect two ports of different cells we take the sum of their missing inductances and use an automated tool to draw an inductance of this value along a user-specified path between ports. Since there is no constrains on power line (red rectangle) inductance we make power connections separately after all signals are routed. We only have to pay attention to intersect a power line with the signal lines at the right angle to magnetically decouple the current flowing in power line (which can be large!) from the signal lines.
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Paul BUNYK
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