SUNY RSFQ Cell Library

SFQ to DC converter

Schematic

Unless otherwise stated, all parameters here and below
are in PSCAN units (for 3.5 um).

How it works

Although the schematic above could seem rather complicated, the device is actually very simple. Its purpose is to monitor the internal state of the T flip-flop build around junctions J0 ... J6 as a DC voltage across the junction J8 (see waveforms below, where /M0/ABS is the average value of the U(/M0/J8) voltage). A straightforward approach to the problem of monitoring the inner state of an RSFQ gate would be to inductively couple it with a DC SQUID. The main idea of such an approach is that when there is no flux inside the gate, the SQUID is in a superconducting state and produces 0 voltage drop. When there is a flux quantum inside the RSFQ gate, the resulting current inductively biases the SQUID into the normal state and we can observe a finite voltage (of the order of Ic*Rn) across it. The SFQ/DC converter above represents a further development of this approach. The J7-J8 pair behaves exactly as an output SQUID. But instead of inductive coupling, it is directly connected to the quantizing inductance of the T flip-flop.

The device was simulated and optimized with a phase source source and a matching JTL at the input and a resistive load at the output:

Here's are all the files (you can also view them online ) necessary to simulate the circuit with PSCAN.

Waveforms

These waveforms show voltages across the input junction J0 and the sensor junctions J7 and J8 of the device. The /M0/ABS curve is the average voltage across the output junction J8. The "input sequence" was very straightforward, but it is instructive to take a look at the test sequence and see how this analog/digital device can be described in SFQHDL.

Layout

This version was laid out for fabrication by Hypres, Inc. Layout size is 110x140 um2.

And here's an actual micro-photograph of the design:

References

The device is very similar to the one described in:

V. K. Kaplunenko, V. P. Koshelets, K. K. Likharev, V. V. Migulin, O. A. Mukhanov, G. A. Ovsyannikov, V. K. Semenov, I. L. Serpuchenko, and A. N. Vystavkin, "Experimental Study of the RSFQ Logic Circuits," in: Extended Abstracts of ISEC'87, Tokyo, pp. 127-130, Aug. 1987.
K. Likharev and V. Semenov, "RSFQ logic/memory family: A new josephson-junction technology for sub-terahertz clock-frequency digital systems", IEEE Trans. Appl. Supercond., vol. 1, pp. 3-28, March 1991.

This SFQ/DC converter was originally designed by J.C. Lin and Prof. V. Semenov . The device proved to be extremely reliable, it was used as a library element for a number of years.

Send comments to A. Rylyakov sasha@rsfq1.physics.sunysb.edu

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